JIIT

Academic Experts

Dr. Vimal Kumar Mishra

ASSOCIATE PROFESSOR

vimalk.mishra@jiit.ac.in

Biography

Dr. Vimal Kumar Mishra is an Associate Professor in the Department of Electronics and Communication Engineering at Jaypee Institute of Information Technology (JIIT), Noida. He earned his Ph.D. in VLSI Design from Madan Mohan Malaviya University of Technology (MMMUT), AKTU Lucknow, M.Tech. in Microelectronics and Embedded Technology from Jaypee Institute of Information Technology, Noida, and B.Tech. in Electronics and Communication Engineering from Uttar Pradesh Technical University, Lucknow.
He has over 11 years of academic and research experience, including work as a Research-cum-Teaching Fellow under the World Bank–funded TEQIP program at MMMUT (2013–2017). His expertise spans semiconductor device modeling, low-power VLSI design, SRAM architectures, and nanoelectronic devices.
Dr. Mishra has played a key role in establishing advanced laboratories, including the ₹90 lakh AICTE IDEA Lab, and VLSI fabrication Lab. He has successfully guided 2 Ph.D. students in device modeling and circuit design.
He has 3 granted Indian patents, 1 granted design patent, several SCI/Scopus-indexed journal and conference papers, and 5 book chapters.

Research Highlights

Dr. Mishra’s research focuses on low-power, high-performance SRAM cell design and emerging semiconductor device architectures, including FD-SOI MOSFETs, Junctionless Transistors, and MBCFETs. His innovations address challenges in device scalability, leakage reduction, and signal stability, critical for next-generation memory systems. He has designed novel CMOS and SRAM topologies such as Tapered Body Reduced Source CMOS Structure and Overlapped Modified Source SRAM structure which enhance read/write stability and reduce power consumption. His FDSOI MOS-based designs target ultra-low-power applications in IoT-enabled systems.
Dr. Mishra integrates TCAD device simulations, CADENCE circuit design, and machine learning–based modeling for predictive performance analysis, bridging device-level research with circuit-level applications.

Areas Of Interest

Low-Power VLSI Design
SRAM Cell Design
FD-SOI MOSFET
MBCFET
Semiconductor Device Modeling
Machine learning and IoT-enabled Systems

Publications

N. Rao and V. K. Mishra, “Photosensitivity Performance of a Gate-Oxide-Stack Intended Source FDSOI-Based 1T Pixel Sensor,” IEEE Sensors Journal, vol. 23, no. 23, pp. 28777–28786, 2023. (SCI, Impact factor- 4.5)
A. P. Singh, V. K. Mishra, and S. Akhter, “A Perspective View of Silicon Based Classical to Non-Classical MOS Transistors and Their Extension in Machine Learning,” Silicon, vol. 15, pp. 6763–6784, 2023. (SCI, Impact factor- 3.3)
Nitu Rao and Vimal Kumar Mishra, “Photoelectric Characterization of Intended Source UTBB 1 T FDSOI Based Image Sensor” Silicon, Springer, vol. 14, pp 7065-7074, 2022 (SCI, Impact factor- 3.3)
VK Mishra, S Pandey, NA Srivastava and RK Chauhan, “A Compact Analytical Drain Current Model of Fully Depleted SOI MOSFETs with Lightly Doped N-underneath the N+ Source Region” Silicon, Springer, vol.13 pp. 1359-1365, 2021 (SCI, Impact factor- 3.3)
V. K. Mishra, B. Bansal, A. Gupta, and A. Agrawal, “Induction of Buried Oxide Layer in Substrate FD-SOI MOSFET for Improving the Digital and Analog Performance,” Silicon, vol. 12, pp. 2241–2249, 2020. (SCI, Impact factor- 3.3)