Academic Experts
Academic Experts
Dr. Shruti Kalra
ASSOCIATE PROFESSOR
shruti.kalra@jiit.ac.in
Biography

Dr. Shruti Kalra is an Associate Professor in the Department of Electronics and Communication Engineering at Jaypee Institute of Information Technology (JIIT), Noida, with over 18 years of experience in teaching, research, and academic leadership. She is a Senior Member of IEEE and a Fellow of IETE, specializing in VLSI full-custom design, CMOS circuit reliability, and the use of machine learning in circuit analysis. She holds a Ph.D. in Electronics and Communication Engineering from JIIT, an M.Tech in VLSI Design from CDAC Noida, and a B.Tech in Electronics and Communication Engineering from UPTU. Dr. Kalra has published more than 40 research papers in indexed journals, contributed to book chapters, and presented her work at several national and international conferences. Her research areas include ultra-deep submicron design, reliability engineering, low-power circuit techniques, thermal modeling, and smart sensors. She has filed two patents and played a key role in developing advanced facilities like the VLSI Fabrication and Characterization Lab. A dedicated mentor, Dr. Kalra has supervised Ph.D. and M.Tech students and organized many workshops and faculty development programs. She also started the IEEE Women in Engineering Affinity Group at JIIT, encouraging young engineers, especially women, to explore careers in science and technology.

Research Highlights

Dr. Shruti Kalra’s research focuses on improving the performance, reliability, and energy efficiency of modern electronic circuits and systems. She works mainly in the field of VLSI full-custom design, CMOS circuit reliability, and machine learning applications in nanoelectronics. Her studies on ultra-deep submicron CMOS circuits have helped understand how temperature, aging effects like Negative Bias Temperature Instability (NBTI), and other physical changes affect circuit performance over time. By developing analytical models and using AI/ML techniques, she has proposed methods to predict device reliability and extend circuit lifetime. She has worked on low-power design techniques, enabling circuits to operate efficiently at near-threshold voltages without losing performance. Her research also covers thermal modeling to prevent overheating in densely packed chips, ensuring safety and long-term stability. Dr. Kalra applies machine learning to problems like reliability forecasting, fault detection, and performance optimization, creating smart methods that help engineers design better circuits faster. She has also explored smart sensors and energy-harvesting systems for applications in renewable energy and portable electronics. Her work includes 40+ indexed journal publications, patents, and contributions to book chapters. She has presented her research at IEEE international conferences and has received recognition for her technical contributions. Through the MeitY Chip to Startup (C2S) project, where she is the Principal Investigator from JIIT, she is developing advanced design capabilities and training future engineers. Her research blends theory, simulation, and practical lab work, contributing to innovations in semiconductor technology and inspiring students to take up advanced electronics research.

Areas Of Interest
  • VLSI Full-Custom Design
  • CMOS Circuit Reliability
  • Machine Learning in Circuit Analysis
  • Low-Power Digital Design
  • Thermal Modeling of Semiconductor Devices
  • Smart Sensors and Energy Harvesting Systems
  • Design Automation for Nanoelectronics
Publications
  1. S. Kalra, “An Insight into Temperature Inversion Using α-Power MOSFET Model for Ultradeep Submicron Digital CMOS Technologies,” AEU–International Journal of Electronics and Communications, vol. 125, p. 153349, July 2020. IF: 3.0.
  2. K. Singh and S. Kalra, “Reliability forecasting and Accelerated Lifetime Testing in advanced CMOS technologies,” Microelectronics Reliability, vol. 151, p. 115261, 2023. IF: 2.32.
  3. S. Kalra and A.B. Bhattacharyya, “A Unified Analytical Transregional MOSFET Model for Nanoscale CMOS Digital Technologies,” International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, vol. 33, issue 1, Jan. 2020. IF: 1.7.
  4. S. Kalra, R. Beniwal, V. Singh, and N. S. Beniwal, “Innovative Approaches in Residential Solar Electricity: Forecasting and Fault Detection Using Machine Learning,” Electricity, vol. 5, no. 3, pp. 585–605, 2024. IF: ~2.9.
  5. K. Singh, S. Kalra, and J. Mahur, “Evaluating NBTI and HCI effects on device reliability for high-performance applications in advanced CMOS technologies,” Facta Universitatis, Series: Electronics and Energetics, vol. 37, no. 4, pp. 581–597, 2024. IF: 0.7.